* (C) Copyright Efficient Power Conversion Corporation. All rights reserved.
*****************************************************************************
* Version History:
* 1.00: 09/21/2021 - Initial Model Creation
* 1.01: 02/15/2023 - Adapted for Simplis, updated gswitch model

.subckt EPC2069 gatein drainin sourcein
*#ASSOC Category=NMOS Symbol=nmos_sub mapping=2,1,3

.param  aWg={Wg*1E-3} Wg=2818000 A1={1.145e-02*aWg} k2=2.300e+00 k3=9.000e-02 rpara=5.526e-04
.param  si={aWg*6.000e-04} so={aWg*3.350e-03} sr={aWg}
+	rpara_s_factor=2.778e-01 aITc=3.000e-03 arTc=-8.360e-03 k2Tc=7.000e-04
+	x0_0=5.349e+00 x0_0_TC=-1.000e-03 x0_1=-9.948e-01 x0_1_TC=0.000e+00
+	dgs1=4.3e-07 dgs2=2.6e-13 dgs3=0.8 dgs4=0.23
+	ags1={7.800e-10*si} ags2={3.660e-10*si} ags3=2.048e+00 ags4=2.070e-01
+	ags5={1.000e-12*si} ags6=1.000e+00 ags7=1.000e+00
+	agd1={6.520e-15*sr} agd2={1.090e-13*sr} agd3=-3.024e+00 agd4=4.061e+00
+	agd5={7.140e-15*sr} agd6=-1.188e+01 agd7=3.001e+01 agd8={1.450e-14*sr}
+	agd9=-1.400e+01 agd10=1.326e+00
+	asd1={8.360e-10*so} asd2={6.830e-11*so} asd3=-1.462e+01 asd4=2.047e+00
+	asd5={-9.500e-10*so} asd6=2.141e+02 asd7=-1.919e+02 asd8={1.530e-12*so}
+	asd9=-3.720e+01 asd10=-1.624e+00
+	rg_value=0.4

.model rpar res(TC1={-1.0*arTc} T_measured=25)
rd drainin  drain  rpar {(1-rpara_s_factor)*rpara}
rs sourcein source rpar {rpara_s_factor*rpara}
rg gatein gate {(rg_value)}

*Large resistors to aid convergence
Rcsdconv drain source {100000Meg/aWg}
Rcgsconv gate source {100000Meg/aWg}
Rcgdconv gate drain {100000Meg/aWg}

.FUNC smthpos(y,d) {0.5*(sqrt(y*y + d*d) + y)}
gswitch drain source Value {if(v(drain,source)>0,
+	(A1*(1-aITc*(Temp-25))*log(1.0+exp((v(gate,source)-(k2*(1-k2Tc*(Temp-25))))/k3))* 
+	v(drain,source)/(1 + (smthpos(x0_0*(1-x0_0_TC*(Temp-25))+x0_1*(1-x0_1_TC*(Temp-25))*v(gate,source),0.1))*v(drain,source))),
+	(-A1*(1-aITc*(Temp-25))*log(1.0+exp((v(gate,drain)-(k2*(1-k2Tc*(Temp-25))))/k3))* 
+	v(source,drain)/(1 + (smthpos(x0_0*(1-x0_0_TC*(Temp-25))+x0_1*(1-x0_1_TC*(Temp-25))*v(gate,drain),0.1))*v(source,drain))))}

ggsdiode gate source VALUE {if( v(gate,source) < 10,
+	0.125*aWg/1077*(dgs1*(exp((v(gate,source))/dgs3)-1)+dgs2*(exp((v(gate,source))/dgs4)-1)),
+	0.125*aWg/1077*(dgs1*(exp((10)/dgs3)-1)+dgs2*(exp((10)/dgs4)-1)) ) }

ggddiode gate drain Value {if( v(gate,drain) < 10,
+	0.125*aWg/1077*(dgs1*(exp((v(gate,drain))/dgs3)-1)+dgs2*(exp((v(gate,drain))/dgs4)-1)),
+	0.125*aWg/1077*(dgs1*(exp((10)/dgs3)-1)+dgs2*(exp((10)/dgs4)-1)) ) }

*Gate-source capacitance
C_GS        gate source  {ags1}  TC=0,0
gC_CGS1     gate source Q={(0.5*ags2*ags4*log(1+exp((v(gate,source)-ags3)/ags4))+
+           ags5*ags7*log(1+exp((v(source,drain)-ags6)/ags7)) )}

*Gate-drain capacitance
C_GD        gate drain  {agd1}  TC=0,0
gC_CGD1     gate drain Q={(0.5*ags2*ags4*log(1+exp((v(gate,drain)-ags3)/ags4))+
+           agd2*agd4*log(1+exp((v(gate,drain)-agd3)/agd4))+
+           agd5*agd7*log(1+exp((v(gate,drain)-agd6)/agd7))+
+           agd8*agd10*log(1+exp((v(gate,drain)-agd9)/agd10)))}

*Source-drain capacitance
C_SD        source drain  {asd1}  TC=0,0
gC_CSD1     source drain Q={(asd2*asd4*log(1+exp((v(source,drain)-asd3)/asd4))+
+           asd5*asd7*log(1+exp((v(source,drain)-asd6)/asd7))+
+           asd8*asd10*log(1+exp((v(source,drain)-asd9)/asd10)) )}

.ends